IBM is betting that the road to useful quantum computing runs through two chips instead of one. On November 11, at its Quantum Developer Conference in Yorktown Heights, New York, the company unveiled Nighthawk r3, a processor designed to run 10,000 quantum operations across 520 programmable qubits — and said it plans to join two of them into a single 1,040-qubit system in 2027, its first machine past the thousand-qubit mark.

The headline number needs a caveat: r3 is a design, not a finished chip. Everything it promises — the qubit count, the operation budget, the two-chip link — is a target for 2027. The evidence that the architecture works comes from Nighthawk r2, already in service and running customer workloads since September.

What r3 is designed to do#

Nighthawk r3 keeps the square-lattice layout of its predecessor, where each qubit can talk to more of its neighbours, and scales it up sharply: 520 programmable qubits, up from 120 in r2, with 2,034 physical qubits on the chip in total. The gap between the two numbers matters. Programmable qubits are the ones available for computation; the rest handle support work such as connections, reset and error correction. The operation budget grows too, from more than 7,500 accurate operations on r2 to a designed 10,000 on r3.

The most important new hardware is not on the chip at all, but at its edges: ten chip-to-chip interconnects IBM calls l-couplers, built to join processors into larger systems. That is the whole point of r3. Rather than cramming ever more qubits onto a single piece of silicon, IBM wants to snap processors together like tiles.

A render of the IBM Quantum Nighthawk r3 processor, a large black chip labelled with 520 programmable qubits
Render of the Nighthawk r3 processor. Image: IBM

Why two chips instead of one#

Linking chips sounds simple and is not: a quantum state has to move between processors without degrading, inside hardware held near absolute zero. IBM says it has already demonstrated the two technologies the plan depends on. This year it connected two Nighthawk r1 processors with four l-couplers and measured 99.3% quantum state transfer fidelity, against a target of 99.9%. It also connected two cryogenic modules into a single system for the first time, reaching operating temperature in under five days and cooling below 15 millikelvin.

Neither demonstration is the finished product, but both are the kind of result a modular roadmap needs before anyone commits to it. If the couplers cannot move quantum states faithfully, two chips are just two small computers, not one big one.

What the current chip is already doing#

The case for r3 rests on r2, and r2 has numbers. The chip runs up to 100,000 samples per second — samples matter because a quantum computer delivers its answer one measurement at a time, and demanding workloads need millions or billions of them. A fast qubit-reset design cuts the idle time between circuit runs, which is where much of the speed comes from.

Customers and partners including E.ON, Algorithmiq and Q-CTRL have now run 34 billion circuits on r2, reporting performance improvements of up to 19 times over IBM’s previous processors. E.ON reported a 15x speedup in quantum machine learning for energy-grid optimisation, and a magnetic-materials simulation run with Oak Ridge National Laboratory ran 12 times faster than the earlier experiment on IBM’s Heron chip, with results consistent with neutron-scattering measurements. Algorithmiq ran its quantum-materials circuits eight times faster than the original — and the new circuits are far harder for classical computers to imitate, needing an estimated 240 times more memory to reach comparable accuracy with leading tensor-network methods.

A gloved hand holding the IBM Quantum Nighthawk processor chip above its gold mounting board
A Nighthawk processor being handled in the lab. Photograph: IBM

The other half of the machine is classical#

IBM’s announcement was not only about silicon. The company also folded high-performance classical computing into its IBM Quantum Platform, so quantum workflows can run alongside ordinary supercomputing in one managed environment. The pitch is that serious quantum workloads are hybrid by nature: classical machines orchestrate, correct errors and post-process, while the quantum chip does the part it is good at.

The early results follow that pattern. With RIKEN, IBM scientists ran a sample-based quantum diagonalisation workflow about five times faster while doing 100 times more computations than in the original study. Cleveland Clinic and RIKEN processed 608 million samples for modelling biologically relevant structures, 33 times faster than without workflow automation. And a new co-design platform with Oak Ridge National Laboratory and AMD physically places Nighthawk processors next to ORNL’s Umbra supercomputer, running AMD Instinct MI355X GPUs and fifth-generation EPYC CPUs — a bet that error correction, the field’s hardest problem, will be solved by hardware designed together rather than bolted together afterwards.

Why it matters#

Quantum computing has spent years arguing about which number matters most: qubit count, error rate, or speed. IBM’s answer, in the words of research director Jay Gambetta, is that useful quantum computing “hinges on whether results can be delivered with accuracy and speed, both are fundamental.” That is the frame for the whole announcement. A 1,040-qubit system that is slow or noisy is a press release; a fast one that stays accurate is a tool.

It is also worth stating what IBM is not claiming: no quantum advantage for r3, and no benchmarks for the finished chip — because the chip does not exist yet. The 1,040-qubit system is a staging post on the road to fault-tolerant quantum computing, not the destination. Read the announcement as a roadmap with receipts: the targets are ambitious, and the predecessor chip has already produced the customer results a roadmap needs to be believed.

What to watch#

  • Delivery. Does r3 hardware arrive in 2027, and does the two-chip link behave as one machine rather than two?
  • Fidelity. Do the l-couplers close the gap from 99.3% state-transfer fidelity to the 99.9% target?
  • Workloads. Does anyone run a problem on the 1,040-qubit system that classical machines genuinely struggle with, rather than a benchmark?
  • Error correction. Does the pulse-level access on the platform and the ORNL/AMD co-design work translate into measurably better error rates?
  • The field. IBM is betting on modular scale while rivals push single-chip size. The next two years will show which approach reaches useful machines first.

Sources#